At the Intel Vision 2022 conference today, Intel let some people take pictures of what the new high-performance and low-performance cores will be. Core 14also called meteor lake which should arrive at the end of next year. What has been revealed is quite interesting, because apparently there will not be as many changes as expected and this gives an opportunity for the price war that every user expects between Intel and AMD.
What we do know is that Intel will continue with its heterogeneous architecture of P-Cores and E-Cores except these will arrive with the High Performance Node Intel 4old 7nm, already with EUV and these being the prelude to the leap to transistors RibbonFET.
Intel Core 14 Meteor Lake, what’s up man?
A Redwood Cove (P-Core) looks like an Evolutionary Golden Cove (GLC).
L2$ seems to be 2MB vs. 1.25 MB on GLC.
L3$ seems to be at least 2.5MB, but probably still 3MB?
The Crestmont cluster seems to have 2-4MB of L2$ shared which is not so clear to me.
Matrix shot from: https://t.co/WMNDH6CHK3 https://t.co/01Wbr0vm01 pic.twitter.com/OPk95HxI9B
—Locuza (@Locuza_) May 11, 2022
The changes won’t be so much due to the architecture, but also to the fact that Meteor Lake will be the first to get a Tiled system in true AMD MCM style, but with caveats. Intel continues to bet on the common interposer where by Foveros Reduce access times and the resulting energy by physically bonding each Tile side by side.
With this in mind, what we are going to see next is not unreasonable, since the photograph taken with a scanning microscope shows us one of the Tiled, in particular the most important: the basic SoC. The configuration appears to be of a low-end processorit might be for Ultrabooks or just an engineering sample they’re testing.
In any case, what we see is a configuration of two high-performance cores and eight efficient cores, where the latter are already visibly cataloged as Crestmont cove as expected. Redwood Cove, instead, it shows a lot more potential in the grip. The FPU unit is larger and does not seem to have AVX512on the other hand, L1 data has a new checking scheme, while integer data is much larger in size, which is surprising and could identify a larger L1 size for them.
Meteor Lake’s iGPU is still hidden
The RWC L2 would remain at 2MB while the shared L3 would be set to 3MB by P-Core, this being shared by cores and according to rumors from also shortcut by GPU Tiled. The design of this SoC isn’t that impressive, it looks like a step forward, but it doesn’t feel like a significant change in caches, more of a trend that could be the prelude to a new change of this aspect to Arrow Lake.
And it would be logical, since already in 2024, the first of the year to be precise, this new architecture promises a total of 40 cores under the same node. So there yes, Intel would be forced to implement more severe changes. Going back to Meteor Lake and Core 14, it doesn’t look like Intel is focused on a big leap forward in cores per se, not in IPC or frequency, but it all seems to revolve around its new iGPU and that’s why it would not been shown, because it assumes an impressive change with its 192 EU.