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AMD Zen 4 processors will support IBS for Linux

There are not a few users who are somewhat dissatisfied with the performance of their AMD Ryzen CPU on Linux. In recent years it has certainly improved a bit, but Windows still has an advantage, in some cases a considerable advantage, which will soon be reduced as AMD adds improved support in IBS Zen 4 for the perf subsystem on Linux.

At the end of last month, AMD sent out a series of patches which, when reviewed, found that the Lisa Su-led company was planning to implement new IBS extensions for new processors that will fall under the Zen 4 architecture and will focus on Linux.

Instruction Based Sampling or IBS: why is AMD making such improvements in Zen 4?

AMD-Zen-4-IBS

This will be a series of new expansions that boil down to two main concepts:

  • information source.
  • Missing L3 cache filtering.

But why is AMD releasing this now and specifically for Linux? The problem lies in the implementation for its direct competitor Microsoft. The Windows kernel introduces many improvements over the Linux kernel, and restructuring the L3 cache requires new profiling to detect bottlenecks.

Keep in mind that IBS with Zen 4 and with these improvements aims to create more profiles so that developers and related software have more complete and accurate program information.

The goal is to elucidate and discern which instructions are doing the job well and which are not, isolating issues related to them to have a processor pipeline and cache hierarchy. work optimally. IBS constantly works with the so-called performance monitoring counters Is PMC and this logs events that occur with processor instructions, so that timely detection does not degrade performance and therefore makes it more consistent.

A breakthrough for AMD, a new cache for the Ryzen 7000

amd-zen4-raphael-overclock-ddr5

Windows uses IBS instructions better than Linux, so the PMC of each processor, no matter how much they report, would not give all the information to the Linux kernel for it to do its job properly, hence this update that AMD itself defines as path:

The DataSrc extensionDataSrc extension provides additional data source details for load/store operations. So it adds support for these new bits in the raw dump of the performance report/script of the PMC.

IBS L3 fault filtering works by labeling an instruction as an IBS “counter overflow” and thus generating a MNI if the tagged instruction causes a lost instruction in this L3. Error-free samples in the L3 cache are discarded and the counter is reset to a random value (between 1 and 15 to pick up pmu and between 1 and 127 for op pmu). This helps reduce sampling overhead when the developer is only interested in these samples. One of the use cases for these filtered samples is to provide data for page migration in memory systems at different levels.

You can add support for L3 error filtering in the IBS driver via the new pmu attribute “l3missonly“.

It’s not only a step forward for AMD on Linux to catch up with Windows in this regard, but it’s two steps ahead of Intel, since Pat Gelsinger includes many more “hardware performance meters” in their processors. “. Then surely we must wait Significant Cache Changes in Zen 4especially at the level of the hierarchy.

VIA: Phoronix

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